The present application relates generally to integrated circuit fabrication, more particularly, to the fabrication of through dielectric via (TDV) structures of different depths in a bonded structure using a single anisotropic etch process.
Three-dimensional (3D) integration of two substrates, can produce a number of benefits to microelectronic applications. For example, 3D integration of microelectronic components can result in improved electrical performance and power consumption while reducing the area of the device footprint.
Through dielectric via (TDV) structures provide electrical connection across the multiple substrates in a bonded structure, thus are essential elements for 3D integration. TDV structures are commonly formed after multiple substrates are bonded. The process used for creating TDV structures must etch through multiple back-end-of-line (BEOL) dielectrics. Typically, more than 5 μm-thick dielectrics need to be etched. In conventional etching processes, the BEOL dielectrics are etched using a plasma of fluorocarbon gases, including for example, CHF3, CH3F, CF4, and CH2F2. However, such conventional gas compositions do not provide sufficient etching rates and etching selectivity that allows etching BEOL dielectrics to form TDVs of different depths in a single etching process, without adversely affecting the integrity of the metal used in the interconnect structures.
Therefore, a method for concurrently forming TDV of different depths, without the need for multiple design masks and/or application of multiple photoresist layers, and with no, or minimal, erosion of interconnect structures remains needed.